Thin-film magnetic random access memories (MRAM) are of interest because of their potential application to nonvolatile and volatile memories. In a conventional MRAM, the magnetic storage cell typically includes a magnetic tunneling junction (MTJ) stack having a free layer, an insulating tunneling barrier layer, and a pinned layer. Use of a conventional MTJ stack makes it possible to design an MRAM cell with high integration density, high speed, low read power, and soft error rate (SER) immunity.
A conventional MRAM also includes bit lines and word lines, which are generally orthogonal. Note that the names of the conventional conductive lines are interchangeable. Other names, such as row line, column line, digit line, and data line, may also be used. The magnetic storage cells are typically located at the intersections of bit lines and word lines. In order to program a particular magnetic storage cell, write currents are driven through both the word line and the bit line associated with a particular magnetic storage cell. A current in only one of the word line or bit line is insufficient to write to the cell. However, in combination, the current provide a sufficient magnetic field to program the MTJ stack as desired.
Although such a conventional MRAM functions, one of ordinary skill in the art will readily recognize that such a conventional MRAM may inadvertently write to nearby cells. Consequently, conventional word lines may be segmented. In such a conventional MRAM, a conventional global word line is coupled through a switch, such as a transistor, to each word line segment. A number of magnetic storage cells, and thus a number of bits, are associated with each segment. As discussed above, a bit line is orthogonal to the segment at each magnetic storage cell. Typically, eight or sixteen bits are associated with each segment in a conventional MRAM having segmented word lines. In a conventional MRAM having segmented word lines, a programming current is provided only to a particular segment of the word line during writing. As a result, the possibility of inadvertently writing to cells not associated with the segment is substantially reduced.
Although the conventional MRAM having segmented word lines can function, one of ordinary skill in the art will readily recognize that such MRAM typically employ separate read and write word lines. Thus, two word lines are associated with each word line segment. This additional line increases the space required for each storage cell. Consequently, a single word line is desired for each cell. However, combining the read word line and the write word line in a conventional MRAM causes the isolation transistors for a particular storage cell to be on during the write operation. Consequently, a high current path from the bit line through the MTJ in the storage cell to ground is established. The high current may damage the MTJ. As a result, reliability of the MRAM is adversely affected.
FIG. 1 depicts another conventional MRAM 10 having storage cells 12. Each storage cell 12 includes a conventional MTJ 14, a conventional isolation transistor 16, and a conventional adaptive voltage source 18. Conventional word lines 30 and 32 are combined read and write word lines. The conventional bit lines 20, 22, 24, and 26 are also used. The current source/sink 42 provides current to the appropriate lines based upon the states of the conventional transistors 44 and 46. The conventional word line segments 54, 56, 58, and 60 receive current based upon the state of the conventional word line select transistors 34, 36, 38, and 40. Conventional return lines 50 and 51 are also depicted. In operation, the conventional adaptive voltage source 18 can be used to provide a voltage, VW, during a write operation. Consequently, the generation of the high current path through the MTJ 14 is avoided.
Although the conventional MRAM 10 functions, one of ordinary skill in the art will readily recognize that it is desirable to eliminate the conventional adaptive voltage source 18. It is also still desirable to reduce the size of the MRAM storage cells 12 and, therefore, increase the density of the MRAM. Moreover, it is also desired to utilize segmented word lines to reduce the inadvertent writing to memory cells not associated with a word line segment.
Accordingly, what is needed is a system and method for providing a MRAM that is capable of having a reduced cell size while utilizing word line segments. The present invention addresses such a need.